Set Verilog include directories and defines
Digital Design Studio 2.0.2: Set Verilog include directories and defines. Check the selected host, account permissions and current support before use.
Save preprocessing settings
In Digital Design Studio 2.0.2, native RTL compilation, source capture and the OSS Icarus Verilog and Verilator runs use saved include directories and defines. In Flow Navigator → Project Manager → Settings, find Project compile inputs. Enter one item per line in Include directories and Defines, save, then run the supported operation again. A project value takes precedence over the IDE default; an explicitly empty project list clears inherited values.
Include directories must stay inside the project, such as
rtl/includeor.. Missing folders produce a warning and are skipped. Parent traversal, paths outside the project, symbolic links and junctions are rejected.Defines use
NAMEorNAME=VALUE, such asSIMULATIONorWIDTH=8, without a command-line-Dprefix. A name starts with a letter or underscore and continues with letters, digits, underscores or$. Conflicting values for one name are rejected; identical entries are deduplicated.Each field accepts up to 1,024 entries, each 1–256 UTF-8 bytes without control characters.
Header search order
RTL compilation, Icarus Verilog and Verilator search in the same order: the project root, your saved include directories in their listed order, then discovered source folders in name order. If a different header next to the including file would otherwise be chosen, Problems and the run log warn about the two paths and identify the file used. Remove ambiguous duplicates when possible.
Save sources and headers before execution. The Testbench Run action saves edited Verilog sources first; other operations use their documented saved-input behavior. A settings or source change can invalidate an earlier capture, estimate or running result. Run again with the saved inputs. Project settings do not enable an unavailable Cloud operation. For a missing header, check the selected project, path, case, saved settings and simulator installation.